What is PCI Express?

PCI Express (officially abbreviated PCIe) is a high-speed serial expansion bus standard that has become the dominant interface for connecting expansion cards and internal peripherals to a computer's motherboard. Introduced in 2003 by a consortium including Intel, Dell, HP, and IBM, PCIe replaced the older parallel bus standards PCI (Peripheral Component Interconnect) and AGP (Accelerated Graphics Port). Its combination of scalability, high bandwidth, and backward compatibility has made it the backbone of modern PC and server internal connectivity.

PCIe matters because virtually every high-performance internal component—graphics cards, NVMe solid-state drives, RAID controllers, sound cards, and 10/25/40 Gigabit network adapters—relies on it to move data quickly to and from the CPU and system memory.

How PCI Express Works

Unlike its predecessor PCI, which used a shared parallel bus where all devices competed for the same set of wires, PCIe uses a point-to-point serial architecture. Each device gets a dedicated connection to a switch or the root complex, eliminating bus contention.

Lanes and Links

The fundamental building block of PCIe is the lane. Each lane consists of two differential signaling pairs—one for transmitting and one for receiving—allowing full-duplex communication. Multiple lanes can be combined to form a link, denoted by the notation x1, x4, x8, or x16. A x16 slot, commonly used for graphics cards, aggregates 16 lanes for maximum bandwidth.

Generations and Bandwidth

Each new PCIe generation roughly doubles the per-lane throughput while maintaining backward and forward compatibility:

PCIe 1.0 — 2.5 GT/s per lane (~250 MB/s per lane)
PCIe 2.0 — 5 GT/s per lane (~500 MB/s per lane)
PCIe 3.0 — 8 GT/s per lane (~985 MB/s per lane)
PCIe 4.0 — 16 GT/s per lane (~1.97 GB/s per lane)
PCIe 5.0 — 32 GT/s per lane (~3.94 GB/s per lane)
PCIe 6.0 — 64 GT/s per lane (~7.56 GB/s per lane)

Bandwidth is measured in GT/s (gigatransfers per second) because encoding overhead affects usable data rates. Earlier generations used inefficient 8b/10b encoding, while PCIe 3.0 and later moved to 128b/130b encoding to reduce overhead.

The Root Complex and Switches

The root complex connects the CPU and memory subsystem to the PCIe fabric. It generates transaction requests on behalf of the processor. PCIe switches can fan out a single upstream link into multiple downstream ports, allowing many devices to share the connection to the root complex.

Physical Slots and Form Factors

PCIe slots come in different physical sizes corresponding to their lane counts. Importantly, a smaller card can fit into a larger slot (e.g., a x1 card in a x16 slot)—a concept known as up-plugging. Some slots are physically x16 but electrically wired for fewer lanes.

Common form factors include:

Standard add-in cards — traditional expansion cards for desktops and servers
M.2 — a compact form factor for NVMe SSDs and Wi-Fi modules that uses PCIe lanes
U.2 — an enterprise SSD connector carrying PCIe signaling
Mini PCIe — used in laptops for wireless cards

Common Use Cases

Graphics cards (GPUs) — typically installed in x16 slots for maximum throughput in gaming, rendering, and AI workloads
NVMe SSDs — leverage PCIe lanes (usually x4) for storage speeds far exceeding SATA
Network interface cards — high-speed 10/25/100 GbE adapters use x8 or x16 links
RAID and HBA controllers — connect large storage arrays in servers
GPU accelerators and FPGAs — used in data centers for machine learning and high-performance computing

Best Practices and Considerations

Check lane allocation: Motherboards have a limited number of CPU and chipset PCIe lanes. Populating multiple slots can cause them to drop from x16 to x8 or x8/x8 configurations.
Match generations wisely: A PCIe 4.0 device works in a PCIe 3.0 slot but is limited to 3.0 speeds. Verify the motherboard supports the device's generation for full performance.
Consider power delivery: High-end GPUs draw far more power than the 75W a slot can supply, requiring supplemental power connectors.
Physical clearance: Large cards may block adjacent slots or require adequate case airflow and cooling.
Bifurcation: Some motherboards support splitting a single x16 slot into multiple links (e.g., x4/x4/x4/x4) to support multiple NVMe drives via an adapter.

Note: PCIe is backward and forward compatible across generations. A newer card in an older slot—or an older card in a newer slot—will function, but always at the speed of the slower component.

Real-World Example

Consider a workstation builder installing a new GPU and two NVMe drives. The graphics card occupies the primary x16 slot connected directly to the CPU. The NVMe drives use M.2 slots wired for x4 PCIe 4.0, delivering read speeds around 7 GB/s. If the builder adds a 10GbE network card in a second x8 slot, the motherboard may automatically reconfigure the GPU slot to run at x8, splitting the CPU's 16 lanes—a common trade-off that technicians must anticipate when planning high-performance builds.